The shortage that shrank for the wrong reason

I. The gap, measured properly — including the direction it moved

Most coverage of the semiconductor talent shortage quotes one number and moves on. The number moved, and how it moved is the most instructive fact in the file.

The European Chips Skills Academy, with the market research firm DECISION, published its Skills Strategy in October 2024 and updated it in 2025. The 2024 edition projected around 271,000 job openings in the European semiconductor industry by 2030, with demand growing about 5% a year against roughly 1% growth in the relevant graduate output, producing an unfilled gap of 75,400 positions. The 2025 update revised that gap to approximately 65,000, equivalent to about 10,800 unfilled positions per year — and stated the reason: four key European investment projects postponed or cancelled, and an 8% market decline in 2024 (ECSA/DECISION, November 2025).

Read what that revision means for a candidate. The shortage did not shrink because Europe trained more engineers. It shrank because Europe built less. A talent gap that closes through cancelled factories is a worse outcome than a talent gap that stays open, and any career decision based on "the shortage is easing" would be reading the number backwards. Note also that France's own auditor, writing in April 2026, cites the earlier figure of about 75,000 unfillable positions (Cour des comptes, April 2026) — two reputable documents, two vintages, and we print both with their dates rather than silently preferring one.

II. Which roles are short, by name

Aggregate gaps do not help an individual. Role-level gaps do. The ECSA strategy quantifies specific shortfalls by 2030: about 3,300 system designers, 2,100 analog designers and 2,600 cybersecurity experts, alongside a requirement for 53,400 electrical and electronic engineering professionals by 2030 across the industry. It also reports that around 13,500 new positions a year must be filled across Europe, and that roughly 10% of European graduates in the relevant disciplines take up work outside the European Union (ECSA/DECISION, November 2025).

Two of those categories deserve emphasis because they are counter-cyclical to the way students choose subjects. Analog and mixed-signal design is the discipline least susceptible to automation-by-tooling and least taught relative to demand; the ECSA analysis singles out analog designers as a persistent shortage even where digital design supply is adequate. Cybersecurity for hardware — not enterprise IT security, but security embedded in silicon — is the second. That is not a coincidence in Grenoble: the FAMES pilot line's published mid-project results include work on physical unclonable functions and polymorphic obfuscation, which is hardware security as a research programme with an industrial destination (FAMES pilot line, 4 June 2026).

The employer signal in the same survey is measured, not euphoric: of the responses gathered from 75 organisations (102 responses), 36% planned to increase their workforce, 49% to maintain it and 14% to reduce it (ECSA/DECISION, November 2025). A sector where half of employers plan a flat headcount and one in seven plans cuts, while simultaneously reporting structural shortage, is a sector hiring selectively for specific competences — not broadly for enthusiasm.

III. The French bottleneck is not the engineer. It is the technician.

This is the finding most likely to change a reader's plan, and it comes from the national auditor rather than from an industry body.

The Cour des comptes reports that, according to the French electronics strategy, two out of three recruitments were considered difficult by companies in the sector in 2022, and that recruitment difficulties are concentrated in maintenance and operator roles — positions whose organisation (notably eight-hour shift rotations and atypical hours) makes them harder to fill. Engineers and technical managers account for around 40% of the sector's national workforce, followed by technicians and skilled industrial workers (Cour des comptes, April 2026).

Concretely: a fabrication plant or a pilot line cannot run 300 mm equipment without equipment-maintenance technicians, process operators and metrology staff, and these are precisely the roles the country struggles to staff. A candidate with a two-year technical diploma in industrial maintenance, automation or measurement physics is arguably better positioned in this valley today than a candidate with a generic engineering master's — a statement we make on the basis of where the documented shortage sits, not as career flattery.

The public response exists and is, by the auditor's own assessment, undersized. Under France 2030, the "Compétences et métiers d'avenir" call financed eight electronics-specific projects plus five projects covering several strategies, with a ceiling of €50 million; since September 2023 these projects have trained close to 19,000 beneficiaries against a total objective of 131,457, and the Court judges the effort insufficient to meet the sector's needs over the next five years. A sector-level EDEC agreement ran from 2019 to 2023 for a total cost of €521,200, funded half by the State and half by the metallurgy branch (Cour des comptes, April 2026). Set €521,200 against the €8.7 billion of programmed capital support for the same industry and the asymmetry speaks without commentary.

IV. Retirement is the hidden half of the shortage

Vacancies created by growth are visible; vacancies created by demography are not, until they arrive all at once. ECSA projects that around 30% of the European semiconductor workforce — approximately 114,000 people — will retire between 2024 and 2030 (ECSA/DECISION, November 2025).

For a research institute this is a specific operational risk rather than a generic one. Pilot-line competence is substantially tacit: knowing which tool drifts, in which season, under which recipe, is knowledge that lives in the people who ran the tool for fifteen years and is transferred by working alongside them. When 30% of that population leaves inside six years, the transfer window is the constraint. It also explains why apprenticeship, alternance and structured internship routes are not junior-level courtesies in this industry — they are the mechanism by which the knowledge survives.

V. Routes into CEA-Leti and the FAMES line

CEA-Leti describes itself as employing more than 2,000 experts, holding a portfolio of 3,200 patents, publishing around 700 papers a year and having created 76 startups, operating 14,000 m² of cleanrooms and participating in the Carnot network and IRT Nanoelec, with offices in San Francisco, Brussels, Tokyo, Taipei and Seoul (CEA-Leti, published 17 January 2024). Its stated model is "lab-to-fab": taking a technology from concept through to industrialisation with partners.

Four routes follow from that model, and each has a different entry logic.

The doctoral route. A PhD prepared at Leti is not an academic detour in this ecosystem; it is the standard on-ramp to advanced-node process, device and design work, because the thesis is normally run against real equipment and often against an industrial partner's roadmap. The institute recruits doctoral and post-doctoral researchers internationally on the strength of its platform.

The technician and operator route. The cleanroom needs equipment engineers and maintenance technicians more urgently than it needs another modelling specialist — see the French recruitment-difficulty data above. This is the route with the widest gap between demand and applicant supply, and the shortest path from a two-year technical qualification to responsibility on production-grade tooling.

The industrial-transfer route. Because the institute's second-largest funding source is a national plan and its largest is industrial contracts (45% of external revenue from industrial contracts, 23% from Nano 2022 support over 2018–2022, per Cour des comptes, April 2026), a substantial share of the work is done in projects whose destination is a partner's factory. Careers accordingly move outward — the audit records that CEA-Leti contributed to the growth of the STMicroelectronics site and to Soitec's recovery, the latter including the transfer of that company's entire R&D onto the Leti site. Proximity to transfer is proximity to the industrial job market.

The training route inside FAMES itself. The pilot line includes a training arm: the FAMES Academy, launched in June 2025, led by Laurent Fesquet, deputy director of the TIMA laboratory at Grenoble INP-UGA, with open-access programmes and, alongside the 2026 open-access call, a pathfinding design kit for 10 nm FD-SOI CMOS (FAMES pilot line, 4 June 2026). A design kit released publicly is a skills instrument as much as a technical one: it lets an engineer outside the institute acquire node-specific competence before ever being hired.

VI. The competences that hold their value here

From the documented technology targets, five competence clusters are defensible rather than fashionable.

FD-SOI process and device engineering. The stated objective is sub-10 nm FD-SOI, with 10 and 7 nm expected to improve density, power, speed and RF performance (Electronics Weekly, 2 February 2026). Strain engineering and self-aligned double patterning appear explicitly in the mid-project results.

3D and sequential integration. The demonstration of fully functional 2.5 V SOI CMOS at a 400 °C thermal budget matters because thermal budget was the barrier to stacking active layers. Low-temperature process integration is a scarce, transferable skill.

Embedded non-volatile memory, including ferroelectrics. The reported first demonstration of a scalable HZO-based ferroelectric capacitor platform integrated in the back-end-of-line at 22 nm FD-SOI places materials-and-integration competence directly on the critical path.

Radio-frequency and acoustic filtering. Bulk acoustic wave filters for the emerging FR3 band (7.125–24.25 GHz) tie RF design and MEMS-adjacent fabrication to a standards timetable that will not move for the convenience of the labour market.

Hardware security. Physical unclonable functions and polymorphic obfuscation, alongside ECSA's projected shortfall of 2,600 cybersecurity experts by 2030, make this the cluster where scarcity and strategic priority coincide most sharply.

VII. Reading the risk honestly

A skills dossier that presents only upside is a recruitment brochure. Three risks are documented and belong here.

First, funding cyclicality. If 23% of an institute's external revenue came from one national plan over 2018–2022, plan renewal is a variable in its project portfolio, and the Court explicitly notes that most aid contracts include revision mechanisms rather than firm job counterparts.

Second, project reversibility. ECSA's downward revision of the European talent gap is driven by cancelled and postponed investments, and it names GlobalFoundries' Crolles investment among them — while the April 2026 audit describes a planned €1.8 billion subsidy for that same Crolles project and €1.1 billion to STMicroelectronics under Liberty. An announced envelope is not an operating plant. Candidates should treat announced fabs as options, not offers.

Third, measurement failure. The Court's central conclusion is that the employment effect of France's semiconductor support is not reliably measured: an initial communicated objective of 4,000 direct and 8,000 indirect jobs, an interim forecast of 3,061 full-time equivalents, and a reconstructed figure of at least 1,795 jobs a year created or maintained by lead firms — which the Court itself calls partial. What is measured is that sector full-time equivalents rose 21.5% between 2018 and 2022 across 172 legal units (Cour des comptes, April 2026). Growth is real; the causal link to any single subsidy is not established.

VIII. What we refuse to print

We publish no CEA-Leti salary range, because we found no primary source stating one and a market average dressed as institute data would be a fabrication. We publish no CEA-Leti annual hiring figure, nor a count of PhD students or post-doctoral researchers on site, for the same reason. We publish no Grenoble-specific or Isère-specific talent-gap number: the ECSA figures are European and the Cour des comptes figures national, and dividing a continental gap by a regional employment share would produce a plausible-looking invention. And we make no claim that the France 2030 training objective of 131,457 beneficiaries applies to microelectronics alone — it is the total objective of the projects the audit describes, and we report it as such.

What remains is enough to act on. Europe needs roughly 10,800 more semiconductor professionals a year than it produces; a third of the existing workforce leaves this decade; France's hardest vacancies are in maintenance and operations, not in slideware; and the specific competences a Grenoble pilot line is buying are published in its own mid-project results. That is a career map drawn from primary documents — including the ones that are unflattering.