The €830 million cleanroom, and the audit that followed it

I. What a pilot line is, and why it decides who gets hired

A research paper does not create a job. A qualified process does. Between the two sits a pilot line: a facility that runs industrial-grade equipment at near-production conditions on volumes too small to be profitable, for the sole purpose of proving that a technology can survive contact with a real factory. Yield, tool availability, contamination control, metrology repeatability — the pilot line is where a laboratory result either becomes transferable or dies quietly.

This is the specific function CEA-Leti performs in the European semiconductor system, and it is why the institute's fortunes and the valley's payroll move together. The Cour des comptes states the dependency plainly: CEA-Leti, installed in Grenoble, is the major research partner of every French public support plan for the microelectronics sector, and it holds world leadership on components that combine digital with non-digital functions — the embedded electronics that is not datacentre compute (Cour des comptes, April 2026). The same report credits the institute with having contributed to the growth of the STMicroelectronics site and to Soitec's recent recovery, the latter including the transfer of all of that company's R&D onto the Leti site.

Two of the three most advanced semiconductor research centres in the world are European, and one of them is here: the audit names CEA-Leti in France, IMEC in Belgium and Fraunhofer in Germany (Cour des comptes, April 2026). That is a genuine European asset, and it sits inside an otherwise weak position — the European Union accounts for only 7% of world chip production and is almost absent from the most advanced nodes.

II. The institute, in its own numbers — and one date that does not agree

CEA-Leti publishes a compact self-description: more than 2,000 experts, a portfolio of 3,200 patents, 14,000 m² of cleanrooms, 76 startups created to date, around 700 publications a year, ISO 9001 certified since 2000, with offices in San Francisco, Brussels, Tokyo, Taipei and Seoul, and membership of the Carnot network and IRT Nanoelec (CEA-Leti, institutional page, published 17 January 2024).

On its founding, two credible documents disagree. CEA-Leti's own page dates its pioneering of micro- and nanotechnologies to 1967; the Cour des comptes writes that the laboratory was created in 1975 (Cour des comptes, April 2026). We print both and resolve neither, because the disagreement is between an institution describing itself and a supreme audit body describing that institution, and inventing a compromise year would be worse than stating the gap.

III. FAMES: what was actually built, and what it is for

FAMES is a five-year, pan-European pilot line coordinated by the CEA, with 11 partners in 8 countries, built as part of Europe's response to the EU Chips Act. Its purpose is narrow and stated: mature five technology families — advanced FD-SOI, embedded non-volatile memories, 3D integration, passive radio-frequency components, and passive components for power management — and transfer them quickly to industry (CEA, 30 January 2026; CEA-Leti, 30 January 2026).

The building is the evidence. Known internally as 41.03, it adds 2,000 m² of cleanroom, was designed and built in two years, carries a five-metre ceiling for large equipment, two basement levels for technical installations, very low vibration levels and dedicated electrical back-up. Chrystel Deguet, deputy director for the development of the institute's microelectronics platform, framed the gain in operational rather than promotional terms: more than 10% additional cleanroom capacity, and infrastructure designed to remain relevant for the next 20 to 30 years. Chief executive Sébastien Dauvé described it as designed from the outset to host the most sophisticated 300 mm equipment and the most advanced lithography tools (CEA-Leti, 30 January 2026).

The environmental figure attached to the building is precise and worth quoting exactly as published: energy-efficient architecture and optimised infrastructure are expected to reduce annual CO₂ emissions by an estimated 651,000 kilograms, which the institute equates to roughly 70 round-the-world flights (CEA-Leti, 30 January 2026). That is a design expectation, not a measured outcome, and we label it as one.

IV. The technology target: FD-SOI below 10 nm

The strategic bet is legible. CEA-Leti's chief technology officer Jean-René Lèquepeys stated that FAMES technologies are intended to support future generations of sub-10 nm FD-SOI chips, and that scaling FD-SOI to 10 and 7 nm would bring significant improvements in density, power consumption, speed and radio-frequency behaviour against current nodes (Electronics Weekly, 2 February 2026). The same report notes the line running FD-SOI wafers for RF, non-volatile memories and power-management ICs, and a demonstration of fully functional 2.5 V SOI CMOS devices fabricated at a thermal budget of 400 °C — the constraint that had blocked large-scale 3D sequential integration.

By mid-2026 the line was reporting results rather than intentions. At the halfway point of the project, coordinator Dominique Noguet, a CEA-Leti vice-president, said the pilot line had reached a pivotal stage with innovative results on all developed technologies, and the FAMES team scheduled a public workshop for 24 June 2026 at Minatec during CEA-Leti's LID World Summit. The results listed for that session are specific: architectural building blocks for the 10 nm FD-SOI node including advanced strain engineering and self-aligned double patterning; a first demonstration of a scalable HZO-based ferroelectric capacitor platform integrated in the back-end-of-line at the 22 nm FD-SOI node; bulk acoustic wave filter solutions for the emerging FR3 band (7.125–24.25 GHz); and hardware-security work on physical unclonable functions and polymorphic obfuscation. The 2026 open-access call was opened alongside a pathfinding design kit for the 10 nm FD-SOI CMOS technology (FAMES pilot line, 4 June 2026).

Open access is the part that matters commercially. The line is accessible primarily — though not exclusively — to European startups, SMEs, industrial groups and research organisations wanting to prototype, qualify and de-risk advanced processes before industrial deployment (Electronics Weekly, 2 February 2026). A pilot line that only serves its own institute is a laboratory with better equipment; a pilot line with an open-access programme and a published design kit is infrastructure.

V. Who pays, and what the auditor found

The money behind this is public, large, and until April 2026 uncounted. The Cour des comptes assembled the first consolidated view: total programmed public support to the French microelectronics sector of €8.7 billion for 2018–2025, of which €5 billion was actually paid over the same period — €7.7 billion programmed by the State (€4.3 billion paid), €715 million of European funds (€561 million paid) and €219.5 million from local authorities. The figure includes the research tax credit and excludes equity participations and non-sector-specific social-contribution exemptions. The Court recommends that this table be updated every year from 2026 (Cour des comptes, April 2026).

Within that, the CEA is the second-largest beneficiary over 2018–2025, receiving more than 30% of programmed aid excluding the research tax credit. Its public-service subsidy for microelectronics alone amounted to €500 million over the period; counting State, local and European sources, supports reached €2.25 billion. The dependency runs the other way too, and the audit quantifies it: Nano 2022 support represented 23% of CEA-Leti's external revenue between 2018 and 2022 — its second source of funding, behind industrial contracts at 45% (Cour des comptes, April 2026).

Read that pair of percentages carefully if you are choosing a career here. An institute funded 45% by industry and 23% by a national plan is neither a university nor a contractor. It is a hybrid whose project portfolio moves with two different clocks: industrial demand, which turns with the semiconductor cycle, and public programmes, which turn with political calendars.

VI. The uncomfortable finding: nobody can prove the jobs

This is where a promotional dossier would stop and this one continues. On employment, the Court's verdict is that the impact of the aid is uncertain. At the launch of Nano 2022 the government communicated an objective of creating or maintaining 4,000 direct and 8,000 indirect and induced jobs — an estimate, the audit notes, that carried no recruitment obligation in the conventions. Interim evaluation forecast 3,061 full-time equivalents. When the Directorate General for Enterprise reconstructed actual recruitment by the programme's lead firms, it found the creation or maintenance of at least 1,795 jobs a year, below the initial estimate, and the Court judges even that figure partial and insufficient to appreciate the projects' employment impact (Cour des comptes, April 2026).

What can be measured is the sector's own growth: across the 172 legal units of the French microelectronics sector, full-time equivalents rose 21.5% between 2018 and 2022. Under the France 2030 electronics strategy the government has communicated a global figure of 5,700 direct jobs to be created — but, the Court observes, not all contracts with aided companies contain job-creation objectives, and where they do, these are not firm counterparts, most contracts providing for revision mechanisms after an opinion from the Bpifrance steering committee.

Sovereignty is measured no better. The audit records that the State does not hold a map of French production by chip type, cannot quantify progress in industrial sovereignty across sectors, and currently measures security of access to strategic components almost exclusively through one indicator: 300 mm wafers produced by STMicroelectronics against the Liberty project target of 620,000 wafers a year. On the Court's request, the DGE surveyed supported lead firms and obtained a reported 50% increase in annual wafer output (200 mm equivalent) between 2018 and 2025 — a number that still does not say when production becomes sufficient for national industrial and defence needs.

One leverage figure deserves to be quoted in the sector's favour, because the same auditor found it: for every euro of Nano 2022 funding granted to lead firms, roughly €4.6 of investment was made by the supported actors, weighted by aid amounts (Cour des comptes, April 2026).

VII. The Crolles contradiction, disclosed rather than smoothed

Two dated documents describe the same neighbouring project differently, and a reader in Isère should see both. The Cour des comptes report of April 2026 describes a planned subsidy of €1.8 billion to GlobalFoundries to build a plant at Crolles in partnership with STMicroelectronics, which is to receive €1.1 billion on the same project (Liberty) — among the largest per-company amounts in the history of French industrial policy. The European Chips Skills Academy's skills strategy of November 2025, meanwhile, lists GlobalFoundries' investment in Crolles among four key European investment projects postponed or cancelled, and revises its European talent-gap forecast downward as a consequence.

Both can be true — an authorised envelope is not a poured foundation — and we do not reconcile them by choosing the more flattering one. What is separately documented is that GlobalFoundries remains an end user of the FAMES pilot line, a role CEA-Leti reaffirmed on 11 June 2026 in the context of more than two decades of joint FD-SOI work (FAMES pilot line, 11 June 2026). Research collaboration and factory construction are different commitments with different consequences for hiring, and conflating them is how a candidate ends up applying to a job that was never funded.

VIII. What this means for the corridor

The French microelectronics sector rests on around a hundred companies — a little more than 170 legal units — and 53,600 employees, with five firms including STMicroelectronics accounting for 85% of production. Revenue was €18.2 billion in 2022, 11% of European semiconductor production, with a trade surplus of €1.8 billion in 2024. 30% of those employees work in Auvergne-Rhône-Alpes, ahead of Île-de-France (17%), Provence-Alpes-Côte d'Azur (14%) and Nouvelle-Aquitaine (10%). Engineers and technical managers make up around 40%⁹ of the national workforce, followed by technicians and skilled industrial workers (Cour des comptes, April 2026).

Set that against the European ambition — the Chips Act's €43 billion and its target of raising Europe's share of the world market to 20% by 2030 from under 10% — and France's own electronics strategy of €5 billion under France 2030, which the audit records as targeting a 90% increase in national semiconductor production capacity by 2030, while the 2021 launch communication spoke of doubling electronic production. We print both formulations because both were published, and the difference between "double" and "+90%" is exactly the kind of drift an audit exists to catch.

IX. What we refuse to print

Four claims a reader might expect are absent, deliberately. We publish no CEA-Leti hiring volume, because the institute does not publish one and inferring it from a headcount total would be invention. We publish no count of jobs created by FAMES, because no document we could open states one; the €830 million and the 11 partners are stated, the payroll is not. We assign no share of the €2.25 billion to the FAMES building, because the audit's figures are institute-wide and the project's own accounting is not public at that granularity. And we make no claim that the eight member states co-funding FAMES are the eight named ones: CEA-Leti's release refers to eight member states and lists seven (Germany, Belgium, Ireland, Finland, Austria, Spain, Poland), so we report the count and the list as published and flag the gap rather than filling it.

The valley's real story is not that public money arrived. It is that a research institute converted it into a facility with a 20-to-30-year design life, an open-access programme, a published design kit and a training academy — while the country's auditor states, on the record, that the employment and sovereignty returns are not yet measurable. Both sentences belong in the same dossier. A reader planning a decade of their working life is entitled to the second one.