What Crolles actually makes: FD-SOI, silicon photonics and a quantum start-up’s wafers

I. Why the technology question is the career question

A fab's process portfolio determines its labour demand far more precisely than its capital expenditure does. Two plants of identical cost hire differently if one runs advanced logic and the other runs mixed-signal and photonics: the first buys lithography specialists, the second buys process integration, test and packaging skills that reach further into optics and analogue design. Reading Crolles through its capital record alone, the subject of the companion dossier, tells a candidate whether the site is expanding. Reading it through its process portfolio tells them what they would actually do there, and whether that skill travels.

So the question this dossier answers is narrow: what does the evidence say Crolles manufactures, and what does it say Crolles does not?

II. The FD-SOI spine and the 18 nm claim

FD-SOI, fully depleted silicon-on-insulator, is the technology on which the site's public identity rests. The claim can be pinned to a primary document: STMicroelectronics' own press release of 11 July 2022, filed as an exhibit with the US Securities and Exchange Commission, states that the planned joint facility with GlobalFoundries at Crolles would support technologies down to 18 nm FD-SOI. That is the company's own wording, and it is the strongest available source for the roadmap.

Two cautions belong immediately beside it. First, the sentence describes the joint facility: the one the trade press reported paused in January 2025, as the companion dossier documents in detail. A roadmap attached to a paused building is a stated intention, not an installed capability. Second, ST's FD-SOI platform is not exclusively a Crolles matter: the company's technology communications place FD-SOI across its manufacturing and design network, and the Grenoble ecosystem's FD-SOI competence is shared with CEA-Leti and with Soitec, which supplies the engineered substrates the process consumes.

The practical reading, then: 18 nm FD-SOI is a documented company statement about a project, and the everyday Crolles line should be understood as a 300 mm platform whose commercially significant differentiator is not the smallest number on its roadmap.

III. The stream that is actually moving: silicon photonics

The most consequential technical development at the site in the current window is not FD-SOI at all. It is optical interconnect.

On 22 January 2026, Reuters reported that STMicroelectronics is considering expanding capacity at Crolles specifically to meet demand for silicon photonics chips used in data-centre interconnect, and that chief executive Jean-Marc Chéry indicated a decision would likely be taken by the end of 2026. The same reporting places the demand pull in artificial-intelligence infrastructure, where electrical links between accelerators and switches are being displaced by optical ones.

Three observations follow, and they are the reason this stream deserves more attention than the paused fab.

• It is demand-pulled, not policy-pulled. The joint fab was announced alongside a national electronics strategy and a state-aid package; the photonics expansion is being weighed against orders. Projects of the second kind survive budget cycles better.
• It is a decision, not a commitment. "Likely by the end of 2026" is a calendar for deciding, not for building. We do not report it as an expansion, because as of this dossier's publication no expansion has been announced.
• It changes the skill mix. Silicon photonics production requires optical test and characterisation, fibre attach, and packaging competences that a purely electrical CMOS line does not exercise. That is a genuinely different hiring profile from the process-technician demand that the companion skills dossier documents around the existing 300 mm line.

Not published, and we looked: no source we could open states a photonics wafer volume, an expansion cost, or a target date for capacity coming online at Crolles. All three are absent. A reader who encounters those numbers elsewhere should ask which document they come from.

IV. The quantum stream: a start-up's wafers on a production line

The third stream is small in volume and large in what it reveals about how the valley works.

Quobly, a Grenoble spin-out from CEA-Leti building silicon spin-qubit quantum processors, announced in 2025 that isotopically purified silicon-28 FD-SOI wafers had begun cycling through the Crolles line. The wafer stack rests on Soitec substrate technology, and Quobly's strategic premise is precisely that a quantum processor built on an industrial FD-SOI platform inherits that platform's manufacturability rather than requiring a bespoke fabrication route.

This is the mechanism the region is actually built on, stated as plainly as we can: a national laboratory (CEA-Leti) produces a spin-out, the spin-out's device is designed to be manufacturable on an existing industrial process (ST's FD-SOI at Crolles), and the substrate under it comes from a third local company (Soitec, at Bernin, a few kilometres away). No single organisation owns the chain. That is why the corridor's employment is more resilient than any one company's order book, and also why an individual employer's pause does not tell you the corridor is contracting.

For a candidate the implication is concrete: work on an industrial 300 mm FD-SOI line at Crolles sits upstream of quantum-hardware programmes without requiring quantum physics. The transferability is in the process discipline, not in the physics.

V. The two-company wafer: why Soitec matters to a Crolles job

An FD-SOI wafer processed at Crolles is not a single-company product. The engineered substrate, a thin silicon layer over a buried oxide, is the input, and Soitec, headquartered at Bernin in Isère, is the reference supplier of that class of substrate. The Quobly programme makes the dependency explicit by naming Soitec substrate technology under the silicon-28 stack.

The strategic consequence is a supply structure that is unusual and, for the region, protective. The substrate maker and the fab sit inside the same twenty-kilometre corridor, alongside the laboratory that developed much of the underlying technology. A process engineer's employability in that corridor is therefore not tied to one employer's capacity decisions: substrate, front-end and research each maintain separate demand cycles.

We stop short of quantifying that. No source we could open publishes a Soitec-to-Crolles volume, a share of supply, or a contractual term, and we will not estimate one.

VI. Boundaries: what Crolles is not

The most frequent factual error in regional coverage is scope creep: attributing to Crolles any technology STMicroelectronics happens to make. The company's own site documentation draws the boundaries, and they are worth stating.

Explicitly unverified, and therefore not asserted: we could not source a primary document placing gallium-nitride power-device manufacturing at Crolles, nor one specifying which imaging or sensor product families are fabricated at Crolles versus at ST's Tours site. Both claims appear in secondary commentary. Neither appears here as fact. A reader building a career hypothesis on "Crolles does GaN" should treat it as unconfirmed until a company document says so.

VII. What we could not source

Four technical figures a serious reader would want are absent from the public record as we found it, and their absence is itself informative: it means public discussion of the site's capacity is running on numbers nobody has published.

1. Wafer starts per week or per year at the existing Crolles 300 mm fab, and the target for the joint facility. The July 2022 release commits to full capacity by 2026 without stating what capacity is.
2. Silicon photonics volumes or the cost of the expansion under consideration.
3. The share of Crolles output by technology platform: FD-SOI versus mixed-signal versus photonics.
4. Cleanroom area, for the existing plant or the extension.

Where a figure is unavailable we say so in the sentence a reader would otherwise trust. That is the whole editorial method, and on this anchor it is doing visible work: a dossier willing to guess would have produced a far more satisfying capacity table and a substantially less true one.

VIII. The analytical conclusion

The unexpected shift at Crolles is not a node. It is a change in what the site is for.

The 2022 framing was sovereignty: European capacity, a national electronics strategy, state aid, a jointly operated fab, 18 nm FD-SOI. Under that framing, the fab's justification was strategic autonomy, and its funding was political. By January 2026 the live question at the same site is optical interconnect for artificial-intelligence data centres, weighed on customer demand, with a decision calendar set by the company rather than by a state. The sovereignty project is paused; the demand project is under decision. The same buildings, a different logic.

That reframing is what a candidate should carry into an interview. The durable competences at Crolles are the ones that serve every stream regardless of which one gets funded: 300 mm process discipline, contamination control, metrology, equipment reliability, statistical process control, and increasingly optical test. The stream-specific competences (FD-SOI device integration, photonics packaging, isotopic substrate handling) are more valuable and more exposed, because each depends on a decision that has not been taken yet.

The capital record behind those decisions, including the contradictory aid figures and the 2025 restructuring, is documented in the companion dossier on this anchor; the hiring and training pipeline is documented in the third.