Executive brief
Reading a semiconductor career from a growth press release is how people end up qualified for a market that has moved. So read this one from the payroll instead. Between 17 November 2025 and mid-May 2026, Soitec's Bernin site ran a short-time working scheme covering the whole workforce (La Tribune, 31 October 2025), under a commitment reported by its CGT union not to pursue economic redundancies during the period (VIPress, 3 November 2025). By 23 April 2026 a voluntary collective-departure scheme was being discussed (Place Grenet), and on 20 July 2026 the CGT branch published that it had signed it. In the same twelve months the company changed chief executive (1 April 2026), and by 2 September 2026 was raising Q2 FY2027 guidance to around 50% growth on photonics demand. Meanwhile Europe's own skills body counts a projected shortfall of 60,000 qualified semiconductor positions by 2030 (European Chips Skills Academy, 19 November 2025). Both things are true at once. This dossier explains what to build, and what we refuse to tell you.
I. The two clocks a substrate career runs on
A microelectronics career in Isère is governed by two clocks that tick at different speeds, and almost every bad career decision in the sector comes from reading only one of them.
The first is the order-book clock. It moves in quarters, it is brutally visible, and it decides whether a site runs full shifts. Soitec's own filings show its swing: full-year FY2025 revenue of €891 million, down 9% (Soitec, 27 May 2025), FY2026 revenue of €592 million, down 34% (Soitec, 27 May 2026), then Q1 FY2027 revenue of €113 million, up 23% year-on-year at constant currency and scope (22 July 2026), and a business update on 2 September 2026 raising expected Q2 growth to around 50% on Photonics-SOI demand.
The second is the qualification clock. It moves in years. A substrate platform earns its place inside a customer's process by surviving characterisation, yield learning and reliability qualification — which is exactly why the skills that build it cannot be hired in a hurry, and why they are not laid off casually either. The two clocks explain the apparent contradiction of 2025-2026: a workforce placed on short-time working by the order book, inside a sector that Europe says is short of 60,000 people by 2030.
If you are choosing a training pathway today, you are betting on the qualification clock. If you are choosing an employer this quarter, you are exposed to the order-book clock. Say which decision you are making before you take advice about it.
II. What actually happened to employment at Bernin, dated
On 14 October 2025 Le Dauphiné Libéré reported that short-time working was under consideration at the Isère site. On 31 October 2025 La Tribune reported the measure would cover the site's roughly 1,800 employees from 17 November 2025. On 3 November 2025 VIPress reported, citing the CGT union, that the scheme was expected to run from mid-November 2025 to mid-May 2026, and that the group had committed not to pursue economic redundancies during that window. On 4 November 2025 Le Journal des Entreprises put group headcount at around 2,300.
Then the instrument changed. On 23 April 2026 Place Grenet reported, on the union's account, that management was considering a rupture conventionnelle collective — a negotiated collective-departure scheme, legally distinct from a redundancy plan because departures are voluntary and individually agreed. On 20 July 2026 the CGT Soitec branch published that it had signed the RCC agreement after consulting employees.
Read as a sequence, this is a textbook European industrial adjustment: absorb the trough with working-time measures, protect the qualification base, then reduce headcount by consent rather than by dismissal. For a candidate, the practical consequence is specific. During an RCC period, a site is simultaneously letting people leave and recruiting for scarce process skills — and those two facts are not in conflict, because the departures are self-selected and the vacancies are not fungible.
III. The roles that were still open while the site was adjusting
The most reliable statement about what an employer wants is the job it is paying to advertise. In late August 2026 — after the short-time working period, after the RCC signature — Soitec was recruiting process and industrialisation engineering roles at Bernin and Grenoble. A listing for Ingénieur process traitement thermique — industrialisation at Bernin, posted 27 August 2026, advertised a range of €42,000 to €56,000 per year. A second listing for a process and industrialisation engineer in the thermal-treatment group, Grenoble, was posted 18 August 2026.
That is one advertised band on two live listings, and we present it as exactly that: a company-reported figure from a job advertisement, not a salary survey, and not a Bernin pay scale. Its value is directional. Thermal treatment is not a fashionable specialism; it is a step where the physics of the bonded interface is decided. When a company under cost pressure keeps paying to advertise that specialism, it is telling you where its yield risk lives.
Soitec's own careers material organises work into families that map to the industrial reality rather than to job-board vocabulary: wafer manufacturing, semiconductor fabs, and polishing and reclaim services. The group recruits through a dedicated portal. Anyone planning an application should read those family pages as the taxonomy the interview will use.
IV. Where the local training pipeline actually is
Grenoble's advantage is not that it has universities. It is that its universities share cleanrooms with the industry that hires from them.
The formal link to Soitec is dated and documented: Grenoble INP – Phelma, Université Grenoble Alpes and Soitec signed their first three-year partnership agreement on 14 March 2022, covering curriculum collaboration, internships and student engagement. MINATEC's own newsletter reported the same partnership, quoting the director of Soitec's Bernin plant. That is the difference between a logo on a careers page and a governed relationship with an engineering school.
The academic routes worth naming precisely:
- Grenoble INP – Phelma, filière internationale Nanotech — a CTI-accredited engineering track in micro- and nanotechnologies for integrated systems, six semesters, Level 7.
- UGA Master Nanosciences et nanotechnologies — nine distinct tracks, including nanochemistry, nanophysics and quantum physics.
- CIME Nanotech — founded in 1981 as a joint UGA and Grenoble INP facility, providing shared cleanroom and equipment access to teaching programmes and laboratories. Hands-on cleanroom time inside a degree is the single most transferable thing a Grenoble student can obtain.
- CEA-Leti doctoral route — Leti runs a formal PhD programme for applied micro- and nanotechnology research tied to industry, with open subjects listed on CEA's thesis portal.
For anyone weighing a doctorate against three years of industrial experience, the honest framing is that in substrates these are not competing options but different entry points to the same problem set: a thesis buys you the physics of the interface; a fab job buys you the statistics of the process. Employers in this corridor pay for both, and rarely for either alone.
V. France 2030's skills instrument, described without inflation
The public money in this story is real, and it is routinely misdescribed. The Compétences et métiers d'avenir (CMA) call was launched by the French state in 2021 within the France 2030 plan — a plan whose total value ANR's own 2025 material states as €54 billion — to align training pathways with national strategic priorities. The government's press kit of 19 December 2023 set out the mechanism, and ANR published a compiled catalogue of CMA training projects in February 2026.
Two CMA projects matter for electronics in this region. FAME (Formations et attractivité des métiers de l'électronique), run at Université Grenoble Alpes, works on the attractiveness of electronics careers and on aligning training content with industry need; Phelma's own page situates it inside France 2030's sovereignty strategy for the sector. INFORISM, an ANR-referenced CMA project (reference IA-23-CMAS-0024), targets training engineering specifically in microelectronics.
What we will not print: a number of people either project promises to train. The project pages we opened state aims, not verified headcount targets, and a training target invented from a press description is precisely the kind of figure that later gets quoted back as fact. If you are a student, the actionable part is not the budget — it is that curriculum content in Grenoble electronics degrees is being revised under a national programme, so the syllabus you enrol in this year is not the one your predecessor took.
VI. The European shortage figure, and what it does not mean
On 19 November 2025 the European Chips Skills Academy — the EU-funded skills initiative coordinated by SEMI Europe — published its 2025 Skills Strategy: Update on the Talent Gap in the EU Semiconductor Ecosystem, authored by analysts at DECISION Études & Conseil. Trade coverage of the report put the projected European shortfall at 60,000 qualified positions by 2030, and ECSA's own account describes a structural problem driven by an ageing workforce and insufficient graduate inflow, worsened since the previous edition by the postponement or cancellation of four major industrial investments.
Note what that last clause does to the naive reading. The shortage is not a promise that any given site is hiring; the same report attributes part of the deterioration to investments that did not happen. A structural shortage and a cyclical hiring freeze coexist comfortably. The correct inference is about the shape of demand — deep, specialised, slow to substitute — not about the timing of a vacancy.
VII. Pay: what can honestly be said
This is where most career content stops being evidence and starts being decoration, so we will be narrow.
APEC, France's executive employment agency, publishes reference sheets for ingénieur procédés and ingénieur process roles, each with a remuneration section. We cite their existence and not their numbers, because we could not read the current bands directly from those pages during verification, and quoting a salary band you have not read is how a rumour acquires a source. What APEC has published, via reported coverage on 19 December 2023, is a broader marker: a median advertised annual salary of €44,500 for engineer positions in industry, drawn from nearly 60,000 executive engineer postings in the first half of 2023. That is economy-wide industry, not microelectronics, and not Isère.
For cleanroom production technicians, the only dated, verifiable advertised band we could open was a semiconductor cleanroom production role at €24,000 to €26,000 per year on a two-shift pattern, in a listing updated 7 August 2026 — in the Paris region, not Grenoble. We print it as a national benchmark and label the geography, because presenting an Île-de-France posting as an Isère salary would be a fabrication by omission.
What follows from three honest numbers rather than a fake table: the advertised distance between a technician entry band and a process-engineering band in this sector is roughly a factor of two, and the bridge between them is qualification-based — statistical process control, metrology, failure analysis, contamination discipline — not seniority-based.
VIII. Which technical bets the evidence actually supports
Portfolio disclosures are career signals, because they say which cleanroom hours a company is willing to defend. Three from the dated record:
Optical interconnect is the line that turned. The company's 2 September 2026 business update attributes its raised Q2 FY2027 guidance to strong Photonics-SOI demand. Photonics is the physical layer of AI data-centre networking, and it is now the stated reason for growth at a company that entered the downturn described as a mobile and automotive supplier.
One line was stopped in public. Soitec announced a programmed phase-out of Imager-SOI with its FY2025 results (27 May 2025), and in its half-year release of 19 November 2025 noted that excluding the discontinued line, Edge & Cloud AI division revenue rose 34%. A discontinued platform is a skills signal as strong as a new one.
Silicon carbide is capacity that exists. The fourth Bernin plant, inaugurated 28 September 2023, was described by Soitec as producing SmartSiC substrates with a 2,5001 m² footprint, capacity of 500,0001 wafers per year and 400 direct jobs created. We state the capacity and the date. We do not state whether that line is ramping, paused or impaired, because no document we verified says — and silence in a filing is not evidence in either direction.
IX. What we deliberately do not tell you
We do not give a Bernin headcount as a point estimate. Published figures range from about 1,690 to 1,800 depending on outlet and month; the audited 2024-2025 Universal Registration Document gives group totals — 2,252 worldwide, 1,791 in France — and no site-level number. A range is the finding.
We do not give a number of RCC departures, a target, or a percentage of the site. No company release we opened states one.
We do not print a Soitec-specific France 2030 or EU Chips Act subsidy amount, nor a trainee target for FAME or INFORISM.
We do not compare career paths in substrates versus fab process work as though a study existed. We looked for one and found none; the comparison in section VII is presented as reasoning from advertised bands, and labelled as such.
X. What to do with this, in order
First, choose the clock. A degree choice answers to the qualification clock and should be made on the strength of the pipeline — Phelma, the UGA master's tracks, cleanroom hours at CIME Nanotech, a Leti thesis — not on this quarter's guidance. A job move answers to the order book and should be made on the current vacancy, dated.
Second, collect evidence an interviewer cannot discount. In substrates, that means measured work: a process capability study you ran, a defect-density argument you can defend, metrology you have interpreted rather than read about. The regional orientation material describing Isère as France's microelectronics heartland, and the Auvergne-Rhône-Alpes investment agency's microelectronics factsheet of 3 February 2026, are useful context — but context is not a portfolio.
Third, read the calendar as an insider would. A site emerging from short-time working with a signed voluntary-departure agreement and rising photonics demand is a site whose skill mix is being re-cut. That is when specific, provable capability is most valuable — and when generic enthusiasm is worth least.
